Product Overview 
1.1 Introduction 

• TOP2812 development board is set based on the TMS320F2812 DSP and EPM240T100C5 CPLD, learning and secondary development platform. 

• Provide over twenty experimental project, while providing complete schematics, code and common peripheral interface, individuals, companies, universities and research institutes can be used as tools for beginners learning and teaching. 

• at the same time, leads to all of the control signal in DSP and CPLD all 80 I / O signal development platform that can be used as a secondary development. 

• Board hardware design fully consider the factors of EMC, EMI and cooling installation, the maximum possible leads all interfaces, so he also can be used as a functional board embedded directly into the product to the user which greatly shorten the product development cycle .

 1.2 Packing List (basic configuration) 

• The TOP2812 development board; 2,'s XDS100 USB2.0 emulator set (containing the 14pin lines and a USB 2.0 cable)3,5 V DC power supply; 4 USB-BLASTER Downloader ; (CPLD download cable) , serial connection straight; 6,1602 LCD modules; 7, the DC motor; 8 ten DuPont-line; 9,2 * 40 double row pin four; 10 the user disc DVD a; 11, DSP Value learning materials Disc DVD three; 12 "TMS320F281X the DSP principles and application examples a tutorial book; 13, warranty cards, receipts, list of products;

1.3 system resources 

• DSP processor TMS320F2812 32-bit fixed-point high-speed digital processor, the maximum operating frequency 150M; 

• chip built-in 128K * 16-bit FLASH, the use of the programming plug-ins can facilitate the curing of the user program, FLASH can be encrypted; 

• tablets within built-18K * 16 bit SRAM; 

• chip built-4K * 16-bit BOOT ROM; 

• chip built-1K * 16-bit OTP ROM; 

• extension 256K * 16-bit SRAM, IS61LV25616,; 

• extension 512K * 16-bit FLASH , SST39VF800, the convenient user programming of a larger program; 

• CPLD the ALTERA MAXII series EPM240T100C5N (equivalent to 8650 CPLD, the capacity twice early MAX Series, and can be programmed for at least 10 million times over), available for download interface Users can write their own code; 

• 2 8 digital tube; including a digital tube for DSP, another two digital tube for CPLD use; 

• 8 LED light tube, convenient status indication; 

• provide eight separate buttons; 

• provide a buzzer; 

• provide an eight DIP switches; 

• reset circuit to ensure reliable reset, independent reset button can be manually reset; 

• 1 channel RS232 interface, can be connected PC experiments; 

• provide 1 channel CAN2.0 interface, user-friendly networking; 

• provide 16 channels of AD input interface (input range 0 to 3V); 

• headphone jack, you can easily playback function; 

• microphone jack, you can easily recording function; 

• 12864 Chinese graphic LCD interface; 

• 1602 character LCD interface; 

• DC motor control interface, anti-anti-plug design; 

• stepper motor control interface, anti-anti-plug design; 

• 6-channel PWM wave output interface; 

• bus open, data lines, address lines, control lines, and special function pins all leads, user-friendly secondary development; 

• powered directly by an external regulated power supply to provide more reliable ; 

• provide high-quality independent power switch, control power, easy to operate; 

• four mounting holes, easy to install fixed; 

• Physical dimensions: 17 * 11 cm;

1.4 Extended Interface 

• DSP bus, AD, DA, EVA, EVB, the PWM function pin all leads, four 32-pin pin interface, pin pitch of 2.54mm, the user can extend; 

• CPLD 80 I / O port through the 4-way interface all leads, pin pitch 2.54mm; 

• comply with the IEEE 1149.1 standard DSP JTAG interface, in which 6 feet empty pin pitch 2.54mm, can be used with the market all the standard JTAG interface emulator; 

• the CPLD JTAG standard interface, anti-plug inverse design can to pick ByteBlasterII or USB-Blaster download cable; 

• 6-way PWM interface leads, pin spacing of 2.54mm; 

• DC motor interface leads, pin spacing of 2.54mm; 

• Stepper motor interface leads, pin pitch 2.54mm; 

• 12864 Chinese graphic LCD interface leads, Block 20 core holes, pin spacing of 2.54mm; 

• 1602 character LCD interface leads to 16-core socket for pin spacing of 2.54mm; 

• 1 Road headphone jack (green); 

• 1 mic jack (pink); 

• CAN2.0 bus interface socket, two blue terminals, 5.08mm pitch; 

• RS232 standard DB9 female connector socket; 

• DC 5V external power supply input interface; 

• DSP operating mode select jumper and a PLL enable selection jumper, 2.54mm pitch;

1.5 information 
 

• Complete schematic (PDF format, fully consistent with the PCB), quickly grasp the practical interface application; 
• 2. All experiments provides a C language source code, are detailed Chinese Notes;
• Burning FLASH online methods and tools for curing your own program; 
• Chip Manual: development board chip chip data; 
• 5. Send the original TI DSP development environment CCS3.3 software (out of the old version CCS2.2 for C2000 software); 
• 6. Provide the emulator drive and other DSP books CD-ROM learning materials; 
• 7. Gift Acrobat reader Bushound USB the bus listens software, Sscom serial debugging assistant debugging tools; 
• 8. Gift Altera download cable schematics; 
• 9. Gift LCD matrix software developed LCD display program essential; 
  10. The gift the TCP / IP protocol Volume: Volume 1 ~ 3; 
• 11. Gift USB specification documents; 
• 12. Gift CAN2.0 specification documents; 
• 13. Gift U disk system documentation; 
• 14. Gift FAT16, FAT32 system documentation; 
• 15. Gift UCOS-II on the F2812 the transplant source; 
• 16. Gift FFT, FIR algorithm library; 
• 17. Gift TI chip package of the full range of library; 
• 18. QuartusII installation video tutorials; 
• 19. Altera download cable hardware installation video tutorial; 
• 20. QUARTUSII 5.1 version of the software. 
• 21. The ModelSim software 
• 22. VHDL language routines Collection (700 cases) 
• 23. VHDL tutorial, VHDL programming teaching examples 
• 24. hardware description language examples set (dozens of program source code)
• 25. VERILOG routine 135 cases 
• 26. the VERILOG tutorial 
• 27. presented scanning books the the "Altera FPGA_CPLD Design (Fundamentals)" Altera FPGA_CPLD design (the advanced version) " 
• 28. exclusive provide QuartusII software proficient essential - the Chinese version QuartusII software guide book 
• 29. User manual: Very detailed, includes hardware circuit analysis, experimental examples presented, CCS3.3 Software Quick Start guidance, TMS320F2812 chip architecture and its basic system; 
  learn above presented information purposes only and not for commercial use!